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STEEP TRANSISTORS WORKSHOP 2016 ESSDERC/EPFL, Lausanne, Switzerland September 11 - 12, 2016 Following the first successful workshop at University of Notre Dame, USA, a second workshop related to Steep Slope Transistors will be arranged in combination with the ESSDERC conference at EPFL, Lausanne, Switzerland. Steep transistors with subthreshold swings less than 60 mV/decade are attracting attention worldwide due to their promise to enable electronic systems operating at 300 mV and below. Interband tunneling or internal gain mechanisms in the gate enable the steep onset of current with gate voltage. This field has seen dramatic development over the last few years, however there is yet no consensus on materials or device architecture, and the mechanisms limiting current performance are the subject of wide study. There are an increasing number of projections about the application space for these transistors, which is now extending beyond digital into the analog domain. This two-day workshop at the EPFL will build on the experiences from the first workshop to refine understanding and accelerate the development by discussions on electrostatics, influence on defects, materials selection, as well as digital and analogue metrics. The workshop format will follow the organization at the first workshop with short focused presentations given by invited speakers that will be combined with focused discussion sessions guided by invited chairs and panelists. The workshop will be included in the ESSDERC framework and may thus be selected by all participants for a special fee, depending on the participation in the ESSDERC conference. Besides the workshop, a focus session on “Implementation of Steep Slope Transistors for Circuit Applications” will be arranged at the ESSDERC conference. The attendees are invited to submit regular papers for the conference in addition to attending the workshop. The registration fee will be waived for the invited speakers. Organizing committee: Lars-Erik Wernersson Lund University, Sweden (Chair) Alan Seabaugh University of Notre Dame, USA Kirsten Moselund IBM Zuerich, Switzerland Aaron Thean IMEC, Belgium Eli Yablonovitch University of California Berkeley, USA Adrian Ionescu EPFL, Switzerland The organizers are from the European E 2 SWITCH consortium, the SRC/STARnet Center for Low Energy Systems Technology (LEAST), and the Center for Energy Efficient Electronics Science (E 3 S). These centers are actively developing steep transistors.
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