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1 Set 3: Single-Stage Amplifiers 1 SM EECE488: Analog CMOS Integrated Circuit Design 3. Single-Stage Amplifiers Shahriar Mirabbasi Department of Electrical and Computer Engineering University of British Columbia [email protected] Technical contributions of Pedram Lajevardi in revising the course notes are greatly acknowledged. Set 3: Single-Stage Amplifiers 2 SM Overview 1. Why Amplifiers? 2. Amplifier Characteristics 3. Amplifier Trade-offs 4. Single-stage Amplifiers 5. Common Source Amplifiers 1. Resistive Load 2. Diode-connected Load 3. Current Source Load 4. Triode Load 5. Source Degeneration
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Page 1: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

1

Set 3: Single-Stage Amplifiers1SM

EECE488: Analog CMOS Integrated Circuit Design

3. Single-Stage Amplifiers

Shahriar MirabbasiDepartment of Electrical and Computer Engineering

University of British [email protected]

Technical contributions of Pedram Lajevardi in revising the course notes are greatly acknowledged.

Set 3: Single-Stage Amplifiers2SM

Overview

1. Why Amplifiers?2. Amplifier Characteristics3. Amplifier Trade-offs4. Single-stage Amplifiers5. Common Source Amplifiers

1. Resistive Load2. Diode-connected Load3. Current Source Load4. Triode Load5. Source Degeneration

Page 2: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

2

Set 3: Single-Stage Amplifiers3SM

Overview

6. Common-Drain (Source-Follower) Amplifiers 1. Resistive Load2. Current Source Load3. Voltage Division in Source Followers

7. Common-Gate Amplifiers

6. Cascode Amplifiers

Set 3: Single-Stage Amplifiers4SM

Reading Assignments

• Reading:Chapter 3 of Razavi’s book

• In this set of slides we will study low-frequency small-signal behavior of single-stage CMOS amplifiers. Although, we assume long-channel MOS models (not a good assumption for deep submicron technologies) the techniques discussed here help us to develop basic circuit intuition and to better understand and predict the behavior of circuits.

Most of the figures in these lecture notes are © Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.

Page 3: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers5SM

Why Amplifiers?

• Amplifiers are essential building blocks of both analog and digital systems.

• Amplifiers are needed for variety of reasons including:

– To amplify a weak analog signal for further processing

– To reduce the effects of noise of the next stage

– To provide a proper logical levels (in digital circuits)

• Amplifiers also play a crucial role in feedback systems

• We first look at the low-frequency performance of amplifiers. Therefore, all capacitors in the small-signal model are ignored!

Set 3: Single-Stage Amplifiers6SM

Amplifier Characteristics - 1

• Ideally we would like that the output of an amplifier be a linear function of the input, i.e., the input times a constant gain:

xy 1α=x

y

• In real world the input-output characteristics is typically a nonlinear function:

Page 4: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers7SM

Amplifier Characteristics - 2

• It is more convenient to use a linear approximation of a nonlinear function.

• Use the tangent line to the curve at the given (operating) point.

x

y

• The larger the signal changes about the operating point, the worse the approximation of the curve by its tangent line.

• This is why small-signal analysis is so popular!

Set 3: Single-Stage Amplifiers8SM

Amplifier Characteristics - 3

• Let to get:

nn xxxxxxy )()()( 0

202010 −++−+−+≈ αααα L

)( 010 xxy −+≈ αα

xyxfyy ∆≈−=−=∆ 100 )( αα

• If x-x0=∆x is small, we can ignore the higher-order terms (hence the name small-signal analysis) to get:

• α0 is referred to as the operating (bias) point and α1 is the small-signal gain.

!)( 0

nxf n

n =α

• A well-behaved nonlinear function in the vicinity of a given point can be approximated by its corresponding Taylor series:

nn

xxnxf

xxxf

xxxfxfy )(!

)()(

!2)(''

)()(')( 002

00

000 −⋅++−⋅+−⋅+≈ L

Page 5: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers9SM

• In practice, when designing an amplifier, we need to optimize for some performance parameters. Typically, these parameters trade performance with each other, therefore, we need to choose an acceptable compromise.

Amplifier Trade-offs

Set 3: Single-Stage Amplifiers10SM

Single-Stage Amplifiers

• We will examine the following types of amplifiers:1. Common Source2. Common Drain (Source Follower )3. Common Gate4. Cascode and Folded Cascode

• Each of these amplifiers have some advantages and some disadvantages. Often, designers have to utilize a cascade combination of these amplifiers to meet the design requirements.

Page 6: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers11SM

Common Source Basics - 1

• In common-source amplifiers, the input is (somehow!) connected to the gate and the output is (somehow!) taken from the drain.

• We can divide common source amplifiers into two groups:

1. Without source degeneration (no body effect for the main transistor):

2. With source degeneration (have to take body effect into account for the main transistor):

Set 3: Single-Stage Amplifiers12SM

Common Source Basics - 2

In a simple common source amplifier:

• gate voltage variations times gm gives the drain current variations,

• drain current variations times the load gives the output voltagevariations.

• Therefore, one can expect the small-signal gain to be:

Dmv RgA ⋅=

Page 7: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers13SM

Common Source Basics - 3

• Different types of loads can be used in an amplifier:1. Resistive Load2. Diode-connected Load3. Current Source Load4. Triode Load

• The following parameters of amplifiers are very important:1. Small-signal gain2. Voltage swing

Set 3: Single-Stage Amplifiers14SM

Resistive Load - 1

• Let’s use a resistor as the load.

• The region of operation of M1 depends on its size and the values of Vinand R.

• We are interested in the small-signal gain and the headroom (which determines the maximum voltage swing).

• We will calculate the gain using two different methods

1. Small-signal model

2. Large-signal analysis

Page 8: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers15SM

Resistive Load - 2

Gain – Method 1: Small-Signal Model

• This is assuming that the transistor is in saturation, and channel length modulation is ignored.

• The current through RD:

• Output Voltage:

• Small-signal Gain:

INmD vgi ⋅=

DINmDDOUT RvgRiv ⋅⋅−=⋅−=

Dm

IN

OUTv Rg

vvA ⋅−==

Set 3: Single-Stage Amplifiers16SM

Resistive Load - 3

Gain – Method 2: Large-Signal Analysis• If VIN<VTH, M1 is off, and VOUT= VDD = VDS.

mDTHINoxnD

IN

OUTv

THINoxnDddDDddOUT

gRVVLWCR

VVA

VVLWCRViRVV

⋅−=−⋅⋅⋅⋅−=∂∂

=

−⋅⋅⋅⋅⋅−=⋅−=

)(

)(21 2

µ

µ

• As VIN becomes slightly larger than VTH, M1 turns on and goes into saturation (VDS≈ VDD > VGS- VTH ≈0).

0=∂∂

=

=⋅−=

IN

OUTv

DDDDDDOUT

VVA

ViRVV

• As VIN increases, VDS decreases, and M1 goes into triode when VIN- VTH = VOUT. We can find the value of VIN that makes M1 switch its region of operation.

)()(21 2

THINTHINoxnDddDDddOUT VVVVLWCRViRVV −=−⋅⋅⋅⋅⋅−=⋅−= µ

Page 9: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers17SM

Resistive Load - 4

Gain – Method 2: Large-Signal Analysis (Continued)• As VIN increases, VDS decreases, and M1 goes into triode.

⎥⎥⎦

⎢⎢⎣

∂∂⋅−+

∂∂⋅−⋅⋅⋅⋅−=

∂∂

⎥⎥⎦

⎢⎢⎣

⎡−⋅−⋅⋅⋅⋅−=⋅−=

IN

OUTOUTOUT

IN

OUTTHINoxnD

IN

OUT

OUTOUTTHINoxnDDDDDDDOUT

VVVV

VVVV

LWCR

VV

VVVVLWCRViRVV

)(

2)(

2

µ

µ

• We can find Av from above. It will depend on both VIN and VOUT.

• If VIN increases further, M1 goes into deep triode if VOUT<< 2(VIN- VTH).

DON

ONDD

OND

DD

THINoxnD

DDOUT

OUTTHINoxnDDDDDDDOUT

RRRV

RR

V

VVLWCR

VV

VVVLWCRViRVV

+⋅=

⋅+=

−⋅⋅⋅⋅+=

⋅−⋅⋅⋅⋅−=⋅−=

11)(1

)(

µ

µ

Set 3: Single-Stage Amplifiers18SM

Resistive Load - 5

Example: Sketch the drain current and gm of M1 as a function of VIN.

• gm depends on VIN, so if VIN changes by a large amount the small-signal approximation will not be valid anymore.

• In order to have a linear amplifier, we don’t want gain to depend on parameters like gm which depend on the input signal.

Page 10: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers19SM

Resistive Load - 6

• Gain of common-source amplifier:

• To increase the gain:

1. Increase gm by increasing W or VIN (DC portion or bias). Either way, ID increases (more power) and VRD increases, which limits the voltage swing.

2. Increase RD and keep ID constant (gm and power remain constant). But, VRD increases which limits the voltage swing.

3. Increase RD and reduce ID so VRD remains constant.

If ID is reduced by decreasing W, the gain will not change.

If ID is reduced by decreasing VIN (bias), the gain will increase. Since RD is increased, the bandwidth becomes smaller (why?).

• Notice the trade-offs between gain, bandwidth, and voltage swings.

eff

RD

D

RDoxn

D

RDTHINoxnDmv V

VI

VLWC

IVVV

LWCRgA ⋅−

=⋅−=⋅−−=⋅−=22)( µµ

Set 3: Single-Stage Amplifiers20SM

Resistive Load - 7

• Now let’s consider the simple common-source circuit with channel length modulation taken into account.

• Channel length modulation becomes more important as RD increases (in the next slide we will see why!).

• Again, we will calculate the gain in two different methods

1. Small-signal Model

2. Large Signal Analysis

Page 11: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

11

Set 3: Single-Stage Amplifiers21SM

Resistive Load - 8

Gain – Method 1: Small-Signal Model

• This is assuming that the transistor is in saturation.

• The current through RD:

• Output Voltage:

• Small-signal Gain:

INmD vgi ⋅=

( ) ( )oDINmoDDOUT rRvgrRiv ⋅⋅−=⋅−=

( )oDm

IN

OUTv rRg

vvA ⋅−==

Set 3: Single-Stage Amplifiers22SM

Resistive Load - 9

Gain – Method 2: Large-Signal Analysis

( )

( )

( )

( )oDmDo

mDo

oD

mD

DD

mD

THINoxnD

OUTTHINoxnDv

IN

OUTTHINOUTTHINoxnD

IN

OUT

OUTTHINoxnDDDDDDDOUT

rRgRr

gRrr

R

gRIRgR

VVLWCR

VVVLWCR

A

VVVVVVV

LWCR

VV

VVVLWCRVIRVV

⋅−=+

⋅⋅−=

⋅+

⋅−=

λ⋅⋅+⋅−

=λ⋅−⋅⋅⋅µ⋅⋅+

⋅λ+⋅−⋅⋅⋅µ⋅−=

⎥⎦

⎤⎢⎣

∂∂⋅λ⋅−⋅+⋅λ+⋅−⋅⋅⋅µ⋅−=

∂∂

⋅λ+⋅−⋅⋅⋅µ⋅⋅−=⋅−=

111)(211

1)(

)(211)(

1)(21

2

2

• As VIN becomes slightly larger than VTH, M1 turns on and goes into saturation (VDS≈ VDD > VGS- VTH ≈0).

Page 12: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

12

Set 3: Single-Stage Amplifiers23SM

Resistive Load - 10

Example:• Assuming M1 is biased in active region, what is the

small-signal gain of the following circuit?

( )omom

IN

OUTv rgrg

vvA ⋅−=∞⋅−==

• I1 is a current source and ideally has an infinite impedance.

• This is the maximum gain of this amplifier (why?), and is known as the intrinsic gain.

• How can VIN change if I1 is constant?

( )OUTTHINoxnD VVVLWCI ⋅+⋅−⋅⋅⋅⋅= λµ 1)(

21 2

• Here we have to take channel-length modulation into account. As VINchanges, VOUT also changes to keep I1 constant.

Set 3: Single-Stage Amplifiers24SM

Diode Connected Load - 1

• Often, it is difficult to fabricate tightly controlled or reasonable size resistors on chip. So, it is desirable to replace the load resistor with a MOS device.

• Recall the diode connected devices:

Body Effect RX (when λ≠0) RX (when λ=0)

NO

YES

m

oX grR 1

=m

X gR 1

=

mbm

oX ggrR

+=

1mbm

X ggR

+=

1

Page 13: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

13

Set 3: Single-Stage Amplifiers25SM

Diode Connected Load - 2

• Now consider the common-source amplifier with two types of diode connected loads:1. PMOS diode connected load:

(No body effect)

2. NMOS diode connected load:(Body effect has to be taken into account)

Set 3: Single-Stage Amplifiers26SM

Diode Connected Load - 3

PMOS Diode Connected Load:• Note that this is a common source configuration

with M2 being the load. We have:

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛⋅−=⋅−== 12

2

111

1oo

m

moXm

IN

OUTv rr

ggrRg

vvA

• Ignoring the channel length modulation (ro1=ro2=∞), we can write:

11

22

222

111

2

1

2

1

22

11

2

1

21

2

2

2

21

THGS

THSG

THSGD

THGSD

m

mv

p

n

Doxp

Doxn

m

m

mmv

VVVV

VVI

VVI

gg

A

LWLW

ILWC

ILWC

gg

ggA

−−=

−⋅−⋅

−=−=

⎟⎠⎞

⎜⎝⎛⋅µ

⎟⎠⎞

⎜⎝⎛⋅µ

−=

⋅⎟⎠⎞

⎜⎝⎛⋅⋅µ

⋅⎟⎠⎞

⎜⎝⎛⋅⋅µ

−=−=⎟⎟⎠

⎞⎜⎜⎝

⎛∞∞⋅−=

Page 14: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

14

Set 3: Single-Stage Amplifiers27SM

Diode Connected Load - 4

NMOS Diode Connected Load:

• Again, note that this is a common source configurationwith M2 being the load. We have:

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+

⋅−=⋅−== 12

22

111

1oo

mbm

moXm

IN

OUTv rr

gggrRg

vvA

• Ignoring the channel length modulation (ro1=ro2=∞), we can write:

THGS

THGSv

m

m

mbm

m

mbmmv

VVVV

LWLW

A

gg

ggg

gggA

−−

⋅+

−=⎟⎠⎞

⎜⎝⎛

⎟⎠⎞

⎜⎝⎛

+−=

+⋅−=

+−=⎟⎟

⎞⎜⎜⎝

⎛∞∞

+⋅−=

1

2

2

1

2

1

22

1

221

11

11

)1(1

ηη

η

Set 3: Single-Stage Amplifiers28SM

Diode Connected Load - 5

• For a diode connected load we observe that (to the first order approximation):1. The amplifier gain is not a function of the bias current. So,

the change in the input and output levels does not affect the gain, and the amplifier becomes more linear.

2. The amplifier gain is not a function of the input signal (amplifier becomes more linear).

3. The amplifier gain is a weak function (square root) of the transistor sizes. So, we have to change the dimensions by a considerable amount so as to increase the gain.

Page 15: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers29SM

Diode Connected Load - 6

4. The gain of the amplifier is reduced when body effect should be considered.

5. We want M1 to be in saturation, and M2 to be on (M2 cannot be in triode (why?)):

6. The voltage swing is constrained by both the required overdrive voltages and the threshold voltage of the diode connected device.

7. A high amplifier gain leads to a high overdrive voltage for the diode connected device which limits the voltage swing.

2111 :2,:1 THDDOUTeffTHGSOUT VVVMVVVVM −<=−>

Set 3: Single-Stage Amplifiers30SM

Diode Connected Load - 6

Example:• Find the gain of the following circuit if M1 is biased in saturation and

Is=0.75I1.

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛⋅−=⎟⎟

⎞⎜⎜⎝

⎛∞⋅−=⋅−== 12

2

112

2

111

11oo

m

moo

m

moIsXm

IN

OUTv rr

ggrr

ggrrRg

vvA

• Ignoring the channel length modulation (ro1=ro2=∞) we get:

11

22

2

1

222

111

22

11

2

1

21

42

2

2

2

21

THGS

THSG

p

n

v

THSGD

THGSD

Doxp

Doxn

m

m

mmv

VVVV

LWLW

A

VVI

VVI

ILWC

ILWC

gg

ggA

−⋅−=

⎟⎠⎞

⎜⎝⎛⋅

⎟⎠⎞

⎜⎝⎛⋅

⋅−=

−⋅−⋅

−=

⋅⎟⎠⎞

⎜⎝⎛⋅⋅

⋅⎟⎠⎞

⎜⎝⎛⋅⋅

−=−=⎟⎟⎠

⎞⎜⎜⎝

⎛∞∞⋅−=

µ

µ

µ

µ

Page 16: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers31SM

Diode Connected Load - 7

Example (Continued):

• We observe for this example that:

1. For fixed transistor sizes, using the current source increases the gain by a factor of 2.

2. For fixed overdrive voltages, using the current source increasesthe gain by a factor of 4.

3. For a given gain, using the current source allows us to make thediode connected load 4 times smaller.

4. For a given gain, using the current source allows us to make theoverdrive voltage of the diode connected load 4 times smaller. This increases the headroom for voltage swing.

Set 3: Single-Stage Amplifiers32SM

Current Source Load - 1

• Note that current source M2 is the load.•• Recall that the output impedance of M2 seen from Vout:

( ) ( )12111

2

oomoXm

IN

OUTv

o

X

XX

rrgrRgvvA

rivR

⋅−=⋅−==

==

• For large gain at given power, we want large ro and

Increase L and W keeping the aspect ratio constant (so ro increasesand ID remains constant). However, this approach increases thecapacitance of the output node.

• We want M2 to be in saturation so

WL

LW

LI

rD

o2

111

=⋅

∝⋅λ

=

2222 effDDOUTeffTHSGOUTDDSD VVVVVVVVV −<→=−>−=

Page 17: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

17

Set 3: Single-Stage Amplifiers33SM

Current Source Load - 2

• We also want M1 to be in saturation:

1111 effOUTeffTHGSOUTDS VVVVVVV >→=−>=

• Thus, we want Veff1 and Veff2 to be small, so that there is more headroom for output voltage swing. For a constant ID, we can increase W1 and W2 to reduce Veff1 and Veff2.

• The intrinsic gain of this amplifier is: • In general, we have:

omv rgA ⋅−=

LAWLr

LWg vom ∝→∝∝

2

,

• But since current in this case is roughly constant:

LWALI

rLWI

LWCg v

D

oDoxnm ∝→∝⋅

=∝⋅⋅⋅=λ

µ 1,2

Set 3: Single-Stage Amplifiers34SM

Triode Load

• We recognize that this is a common source configuration with M2 being the load. Recall that if M2 is in deep triode, i.e., VSD<<2(VSG-|VTH|), it behaves like a resistor.

( )

( ) ( )( )1212 ,11

:2

oONmv

THbddoxpTHSGoxp

ON

THSGSD

rRgAVVV

LWCVV

LWC

R

VVVIf

⋅−=−−⋅⋅⋅

=−⋅⋅⋅

=

−<<

µµ

• Vb should be low enough to make sure that M2 is in deep triode region and usually requires additional complexity to be precisely generated.

• RON2 depends on µp, Cox, and VTH which in turn depend on the technology being used.

• In general, this amplifier with triode load is difficult to design and use!

• However, compared to diode-connected load, triode load consumes less headroom:

DDOUTeffTHGSOUT VVMVVVVM ≈=−> :,: 2111

Page 18: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers35SM

Source Degeneration - 1

• The following circuit shows a common source configuration with a degeneration resistor in the source.

• We will show that this configuration makes the common source amplifier more linear.

• We will use two methods to derive the gain of this circuit:1. Small-signal Model2. Using the following Lemma

Lemma:In linear systems, the voltage gain is equal to –GmRout.

Set 3: Single-Stage Amplifiers36SM

Source Degeneration - 2

Gain – Method 1: Small Signal Model

( )( ) SDSmbmO

DOm

IN

OUTv

DINmO

S

O

DSmbSmOUT

O

SD

OUTOUT

SD

OUTmbS

D

OUTINm

D

OUT

SD

OUTSOUTBSS

D

OUTINSOUTIN

D

OUTOUT

O

SOUTOUTBSmbmOUT

RRRggrRrg

vvA

RvgrR

rRRgRgv

r

RR

vvR

RvgR

Rvvg

Rv

RR

vRivRR

vvRivv

Rvi

rRivvgvgi

++⋅++⋅⋅⋅−

==

⋅⋅−=⎟⎟⎠

⎞⎜⎜⎝

⎛++⋅+⋅+⋅

⋅++⎟⎟

⎞⎜⎜⎝

⎛⋅⋅+⎟⎟

⎞⎜⎜⎝

⎛⋅+⋅=

⋅=⋅−=⋅+=⋅−=

−=

⋅−+⋅+⋅=

1

1

,

,

1

1

Page 19: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers37SM

Source Degeneration - 3

Gain – Method 2: Lemma

• The Lemma states that in linear systems, the voltage gain is equal to –GmRout. So we need to find Gm and Rout.

1. Gm:Recall that the equivalent transconductance of the aboveCircuit is:

( ) ( ) SSmbm

m

SSmbSm

mm RRggr

rgRRgRgrr

rgviG

O

O

OO

O

IN

OUT

+⋅++⋅

=+⋅+⋅⋅+

⋅==

]1[

Set 3: Single-Stage Amplifiers38SM

Source Degeneration - 4

Gain – Method 2: Lemma (Continued)1. ROUT:

We use the following small signal model to derive the smallsignal output impedance of this amplifier:

( )( ) ( )( )

( ) ( )

( )( )( )( ) DOSmbmS

DOSmbmSDXOUT

OSmbmSOSmbSmSX

XX

OSXmbSXmXSX

OBSmbmXSXX

SXBSSX

RrRggRRrRggRRRR

rRggRrRgRgRivR

rRigRigiRirvgvgiRiv

RivRiv

+⋅⋅+++⋅⋅⋅+++

==

⋅⋅+++=⋅⋅+⋅++==

⋅⋅−⋅−⋅−⋅−+⋅=⋅⋅−⋅−+⋅=

⋅−=⋅−=

)(1)(1

)(11

,

1

1

• Since typically rO>>RS:

( ) ( ) ( ) OSmbmOSmbmOSmbmSX rRggrRggrRggRR ⋅⋅+=⋅⋅++=⋅⋅+++= )(1)(1

Page 20: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

20

Set 3: Single-Stage Amplifiers39SM

Source Degeneration - 5

Gain – Method 2: Lemma (Continued)

( )( )( )( )

( ) DOSmbmO

DOm

DSOmbOmO

DSOmbOmO

SSmbSmOO

OmOUTmv

RrRggrRrg

RRrgrgrRRrgrgr

RRgRgrrrgRGA

+⋅⋅+++⋅⋅−

=

+⋅⋅+⋅++⋅⋅⋅+⋅++

⋅+⋅+⋅⋅+

⋅−=⋅−=

)(1

11

( )( )( ) DOSmbmS

DOSmbmSOUT RrRggR

RrRggRR+⋅⋅+++⋅⋅⋅+++

=)(1)(1

( ) SSmbmO

Omm RRggr

rgG+⋅+⋅+

⋅=

)1(

Set 3: Single-Stage Amplifiers40SM

Source Degeneration - 6

• If we ignore body effect and channel-length modulation:

Method 1 – Small-signal Model:

Sm

DmOUTmv Rg

RgRGA⋅+⋅−

=⋅−=1

( )( )( )

( )( )( ) D

Smbm

DSmbm

DSOmbOmO

DSOmbOmOOUT R

RggRRgg

RRrgrgrRRrgrgrR

mbgor

=⋅++⋅⋅++

=+⋅⋅+⋅++⋅⋅⋅+⋅++

=→∞→ 1

111lim

0

( ) ( ) Sm

m

Smbm

m

SSmbSmOO

Omm Rg

gRgg

gRRgRgrr

rgGmbg

or ⋅+=

⋅++=

+⋅+⋅⋅+⋅

=→∞→ 11

lim0

Sm

Dm

IN

OUTv

Sm

INGS

SGSmINGSDGSmOUT

RgRg

vvA

Rgvv

RvgvvRvgv

⋅+⋅−

==→⋅+

⋅=

⋅⋅−=⋅⋅−=

111

,

Method 2 – Taking limits:

Page 21: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

21

Set 3: Single-Stage Amplifiers41SM

Source Degeneration - 7

Obtaining Gm and Rout directly assuming λ=γ=0:1. Gm:

Sm

m

IN

Dm

Sm

INGS

SGSmINGSGSmD

Rgg

viG

Rgvv

Rvgvvvgi

⋅+==→

⋅+⋅=

⋅⋅−=⋅=

111,

2. ROUT:

D

X

XOUT

D

XGSm

D

XX

GSSGSmGS

RivR

Rvvg

Rvi

vRvgv

==

=⋅+=

=→⋅⋅−= 0

Sm

DmOUTmv Rg

RgRGA⋅+⋅−

=⋅−=1

Set 3: Single-Stage Amplifiers42SM

Source Degeneration - 8

• If we ignore body effect and channel-length modulation:

Sm

DmvDOUT

Sm

mm Rg

RgARRRg

gG⋅+⋅−

=→=⋅+

=1

,1

• We Notice that as RS increases Gm becomes less dependent on gm:

SSm

mm RRg

gGsRsR

11

limlim =⋅+

=∞→∞→

• That is for large RS: OUTSIN

SIN

OUTm iRv

RviG ⋅≈→≈=

1

• Therefore, the amplifier becomes more linear when RS is large enough. Intuitively, an increase in vIN tend to increase ID, however, the voltage drop across RS also increases. This makes the amplifier less sensitive to input changes, and makes ID smoother!

• The linearization is achieved at the cost of losing gain and voltage headroom.

Page 22: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers43SM

Source Degeneration - 9

• We can manipulate the gain equation so the numerator is the resistance seen at the drain node, and the denominator is the resistance in the source path.

• The following are ID and gm of a transistor without RS.

S

m

D

Sm

Dmv

Rg

RRg

RgA+

−=

⋅+⋅−

= 11

• ID and gm of a transistor considering RS are:• When ID is small such that RS gm<<1, Gm ≈ gm.• When ID is large such that RS gm>>1, Gm ≈1/ RS.

Set 3: Single-Stage Amplifiers44SM

Alternative Method to Find the Output-Resistance of a Degenerated Common-Source Amplifier

Page 23: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

23

Set 3: Single-Stage Amplifiers45SM

Why Buffers?

• Common Source amplifiers needed a large load impedance to provide a large gain.

• If the load is small but we need a large gain (can you think of an example?) a buffer is used.

• Source-follower (common-drain) amplifiers can be used as buffers.

Ideal Buffer:1. RIN=∞: the input current is zero; it doesn’t load the previous stage.

2. ROUT=0: No voltage drop at the output; behaves like a voltage source.

1,0, ==∞= VOUTIN ARR

Set 3: Single-Stage Amplifiers46SM

Resistive Load - 1

• We will examine the Source follower amplifier with two different loads:1. Resistive Load2. Current Source Load

– Resistive Load:• As shown below the output (source voltage) will follow the input (gate

voltage). We will analyze the following circuit using large-signal and small-signal analysis.

Page 24: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers47SM

Resistive Load - 2

Large Signal Analysis:• The relationship between VIN and VOUT is:

( ) ( )

( ) ( )SOUTDDTHOUTINoxnOUT

SDSTHGSoxnDSOUT

RVVVVVLWCV

RVVVLWCIRV

⋅⋅−⋅+⋅−−=

⋅⋅+⋅−=⋅=

λλµ

λµ

121

121

2

2

( )

IN

OUT

IN

OUT

SBFIN

OUT

OUT

TH

IN

TH

OUTSBFSBFTHTH

VV

VV

VVV

VV

VV

VVVVV

∂∂⋅=

∂∂⋅

+Φ⋅=

∂∂⋅

∂∂

=∂∂

=Φ⋅−+Φ⋅⋅+=

ηγ

γ

22

,220

( ) ( )

( ) ( )IN

OUTSTHGSoxn

SDS

IN

TH

IN

OUTTHOUTINoxn

IN

OUT

VVRVV

LWC

RVVV

VVVVV

LWC

VV

∂∂⋅−⋅⋅−+

⋅⋅+⋅⎟⎟⎠

⎞⎜⎜⎝

⎛∂∂

−∂∂

−⋅−−=∂∂

λµ

λµ

2

21

11

• Differentiate with respect to VIN:

• Need to find the derivative of VTH with respect to VIN:

Set 3: Single-Stage Amplifiers48SM

Resistive Load - 3

( )

S

o

mbm

Sm

o

SSmbSm

Sm

IN

OUTV

SmSDSmSm

IN

OUT

Rr

gg

Rg

rRRgRg

RgVVA

RgRIRgRgVV

⋅⎟⎟⎠

⎞⎜⎜⎝

⎛+++

⋅=

+⋅+⋅+

⋅=

∂∂

=

⋅=⋅⋅+⋅⋅+⋅+⋅∂∂

111

1 λη

Large Signal Analysis (Continued):• The small signal gain can be found:

• If channel-length modulation is ignored (ro=∞) we get:

( ) Smbm

Sm

IN

OUTV Rgg

RgVVA

⋅++⋅

=∂∂

=1

Page 25: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

25

Set 3: Single-Stage Amplifiers49SM

Resistive Load - 4

Small Signal Analysis:• We get the following small signal model:

( )

( ) ( )( )

( )

( )

11

1

,,

+⎟⎟⎠

⎞⎜⎜⎝

⎛++⋅

⋅=

+⋅+⋅+⋅⋅⋅

=⋅⋅+⋅⋅++

⋅⋅==

⋅⋅⋅=⋅⋅+⋅⋅++⋅+⋅

⋅−⋅+−⋅=

−=−=⋅⋅+⋅=

mbm

O

S

Smv

OOmbOmS

OSm

OSmbOSmOS

OSm

IN

OUTv

INOSmOSmbOSmOSOUT

OS

OSOUTmbOUTINmOUT

OUTBSOUTINGSOSBSmbGSmOUT

ggr

R

RgA

rrgrgRrRg

rRgrRgrRrRg

vvA

vrRgrRgrRgrRvrRrRvgvvgv

vvvvvrRvgvgv

Set 3: Single-Stage Amplifiers50SM

Resistive Load - 5

• Graph of the gain of a source-follower amplifier:

1. M1 never enters the triode region as long as VIN<VDD.

2. Gain is zero if VIN is less than VTH (because gm is 0).

3. As VIN increases, gm increases and the gain becomes:

4. As VOUT increases, η decreases, and therefore, the maximum gain increases.

5. Even if RS=∞, the gain is less than one:

6. Gain depends heavily on the DC level of the input (nonlinear amplifier).

η+=

+≈

11

mbm

mv gg

gA

11 <++

o

mbm

mV

rgg

gA

Page 26: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

26

Set 3: Single-Stage Amplifiers51SM

Current Source Load

• In a source follower with a resistive load, the drain current depends on the DC level of VIN, which makes the amplifier highly nonlinear.

• To avoid this problem, we can use a current source as the load.

• The output resistance is:

2

11

11121

11

11

11,11o

mbm

oIMOUToI

mbm

oM rgg

rRRRrRgg

rR ==→==

• If channel length modulation is ignored (ro1=ro2=∞) :

111111

11111mbmmbmmbm

OUT ggggggR

+==∞∞=

• Note that the body effect reduces the output impedance of the source follower amplifiers.

Set 3: Single-Stage Amplifiers52SM

Voltage Division in Source Followers - 1

• When Calculating output resistance seen at the source of M1,i.e., RM1,, we force vIN to zero and find the output impedance:

11

11

11mbm

oM ggrR =

• However, if we were to find the gain of the amplifier, we would not suppress vIN.

• Here, we would like to find an equivalent circuit of M1, from which we can find the gain.

• Consider the small-signal model of M1:

Page 27: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers53SM

Voltage Division in Source Followers - 2

• For small-signal analysis vBS= vDS, so gmbvBS dependant current source can be replaced by a resistor (1/gmb) between source and drain.

• Note that, when looking at the circuit from the source terminal, we can replace the gmvGS dependant current source with a resistor (of value 1/gm) between source and gate.

• Simplified circuit:

Set 3: Single-Stage Amplifiers54SM

Voltage Division in Source Followers - 3

Example:• Find the gain of a source follower amplifier with a resistive

load.• We draw the small signal model of this amplifier as shown

below to get:

mmb

OS

mb

OS

IN

OUTvIN

mmb

OS

mb

OS

OUT

ggrR

grR

vvAv

ggrR

grR

v11

1

11

1

+==→⋅

+=

mOSmbOSOS

mOS

mmbOSOS

OS

mbOSOS

OS

mmb

OS

mb

OSv grRgrRrR

grR

ggrRrRrR

grRrRrR

ggrR

grRA

⋅⋅+⋅⋅++⋅⋅

=+

⋅⋅++⋅

⋅⋅++⋅

=+

++

++= 11

111

111

• We can show that this is equal to what we obtained before:

Page 28: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

28

Set 3: Single-Stage Amplifiers55SM

Voltage Division in Source Followers - 4

Example:• Find the gain of a source follower amplifier with a current

source load.• Small-signal model of this amplifier is:

11

12

1

12

11

12

1

12

11

1

11

1

mmb

OO

mb

OO

IN

OUTvIN

mmb

OO

mb

OO

OUT

ggrr

grr

vvAv

ggrr

grr

v+

==→⋅+

=

• If we ignore channel length modulation:

11

1

11

1

11

1

11

1

mmb

mb

IN

OUTvIN

mmb

mbOUT

gg

gvvAv

gg

gv+

==→⋅+

=

Set 3: Single-Stage Amplifiers56SM

Voltage Division in Source Followers - 5

Example:• Find the gain of a source follower amplifier with a resistive

load and biased with a current source.

• Small-signal model of this amplifier is:

11

12

1

12

11

12

1

12

11

1

11

1

mmb

OLO

mb

OLO

IN

OUTvIN

mmb

OLO

mb

OLO

OUT

ggrRr

grRr

vvAv

ggrRr

grRr

v+

==→⋅

+

=

Page 29: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

29

Set 3: Single-Stage Amplifiers57SM

Voltage Division in Source Followers - 6

Example:• Find the gain of a source follower amplifier with a resistive

load.

• Small-signal model of this amplifier is:

1221

12

221

12

1221

12

221

12

1111

111

1111

111

mmbmmb

OO

mbmmb

OO

IN

OUTvIN

mmbmmb

OO

mbmmb

OO

OUT

ggggrr

gggrr

vvAv

ggggrr

gggrr

v+

==→⋅+

=

Set 3: Single-Stage Amplifiers58SM

Advantages and Disadvantages - 1

1. Source followers have typically small output impedance.

2. Source followers have large input impedance.

3. Source followers have poor driving capabilities..

4. Source followers are nonlinear. This nonlinearity is caused by:Variable bias current which can be resolved if we use a current source to bias the source follower.Body effect; i.e., dependence of VTH on the source (output) voltage. This can be resolved for PMOS devices, because each PMOS transistor can have a separate n-well. However, because of low mobility, PMOS devices have higher output impedance. (In more advanced technologies, NMOS in a separate p-well, can be implemented that potentially has no body effect)Dependence of ro on VDS in submicron devices.

Page 30: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers59SM

Advantages and Disadvantages - 2

5. Source followers have voltage headroom limitations due to level shift.Consider this circuit (a common source followed by a source follower):

• If we only consider the common source stage, VX>VGS1-VTH1.

• If we only consider the source follower stage, VX>VGS3-VTH3+ VGS2.

• Therefore, adding the source follower will reduce the allowable voltage swing at node X.

• The DC value of VOUT is VGS2 lower than the DC value of VX.

Set 3: Single-Stage Amplifiers60SM

Common-Gate

Av = (gm + gmb )RD = gm(1 + η)RD

Page 31: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

31

Set 3: Single-Stage Amplifiers61SM

Common-Gate

Av =(gm + gmb )ro +1

ro + (gm + gmb )roRS + RS + RD

RD

Set 3: Single-Stage Amplifiers62SM

Common-Gate

Av =(gm + gmb )ro +1

ro + (gm + gmb )roRS + RS + RD

RD

)||)((:0 DombmvS RrggAR +≈= for

Page 32: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

32

Set 3: Single-Stage Amplifiers63SM

Common-Gate Input Impedance

ombm

o

ombm

D

ombm

oDin rgg

rrgg

Rrgg

rRR)(1)(1)(1 ++

+++

=+++

=

)1||1||()(1 mbm

oombm

Din gg

rrgg

RR +++

=

Set 3: Single-Stage Amplifiers64SM

Common-Gate Input Impedance

• Input impedance of common-gate stage is relatively low only if RD is small

• Example: Find the input impedance of the following circuit.

Page 33: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

33

Set 3: Single-Stage Amplifiers65SM

Example

• Calculate the voltage gain of the following circuit:

ombmv rggA )(1 ++=

Set 3: Single-Stage Amplifiers66SM

Common-Gate Output Impedance

DSoSmbmout RRrRggR ||])(1[ +++=

Page 34: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

34

Set 3: Single-Stage Amplifiers67SM

Example

• Compare the gain of the following two circuits (λ=γ=0 and 50Ω transmission

lines!)

Set 3: Single-Stage Amplifiers68SM

Cascode Stage

Doombm

Dooombmout

RrrggRrrrggR

||])[( ||])(1[

2122

12122

+≈+++=

AV ≈ gm1[ro1ro2 (gm2 + gmb2 )] || RD ]

• Cascade of a common-source stage and a common-gate stage is called a “cascode” stage.

Page 35: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers69SM

Cascode Stage

AV ≈ gm1[(ro1ro2 gm2 ) || (ro3ro4gm3 )]

Set 3: Single-Stage Amplifiers70SM

Output Impedance Comparison

Page 36: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

36

Set 3: Single-Stage Amplifiers71SM

Shielding Property

Set 3: Single-Stage Amplifiers72SM

Board Notes

Page 37: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

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Set 3: Single-Stage Amplifiers73SM

Triple Cascode

• What is the output resistance of this circuit?

• Problem?

Set 3: Single-Stage Amplifiers74SM

Folded Cascode

Page 38: EECE488: Analog CMOS Integrated Circuit Design 3. …courses.ece.ubc.ca/488/notes/eece488_set3_2up.pdf · 1 Set 3: Single-Stage Amplifiers SM 1 EECE488: Analog CMOS Integrated Circuit

38

Set 3: Single-Stage Amplifiers75SM

Output Impedance of a Folded Cascode

231222 )||]()(1[ oooombmout rrrrggR +++=


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