Memory Management

1. Describe the sequence of instruction-execution life cycle?

• A typical instruction-execution life cycle:

• Fetches (load) an instruction from specific memory address.

• Decode the instruction and fetch operands from specific memory address.

• Execute the instruction on the operands.

• Store the results back in memory.

2. Memory unit only sees a stream of addresses + read requests during READ Operation and A

stream of address + data and write requests during Write Operation.

3. What two registers can be used to provide a simple form of memory protection?

Base register

Limit Register

4. List the three different times at which address binding may occur.

- Compile Time

- Load Time

- Execution Time

5. Compare between logical address and physical address?

Logical address Physical address

Does not refer to an actual existing address.

it refers to an abstract address

A logical address is generated by the CPU

Refers to an actual physical address in memory.

Physical addresses are generated by the MMU.

6. Consider a system in which a program can be separated into two parts: code and data. The

CPU knows whether it wants an instruction (instruction fetch) or data (data fetch or store).

Therefore, two base-limit register pairs are provided: one for instructions and one for data.

The instruction base–limit register pair is automatically read-only, so programs can be shared

among different users. Discuss the advantages and disadvantages of this scheme.

Answer:

Advantages Disadvantages

An effective mechanism for code and data

sharing. For example, only one copy of an

editor or a compiler needs to be kept in

memory, and this code can be shared by all

processes needing access to the editor or

compiler code.

Protection of code against modification

the code and data must be separated

7. Why memory page sizes are always powers of 2?

It is most efficient to break the address into X page bits and Y offset bits, rather than perform arithmetic

on the address to calculate the page number and offset. Because each bit position represents a power of

2, splitting an address between bits results in a page size that is a power of 2.

8. Consider a logical address space of 64 pages of 1024 words each, mapped onto a physical

memory of 32 frames.

a. How many bits are there in the logical address?

b. How many bits are there in the physical address?

Answer:

a. Logical address: 16 bits

b. Physical address: 15 bits

9. Describe a mechanism by which one segment could belong to the address space of two different

processes.

Answer:

Since segment tables are a collection of base–limit registers, segments can be shared when entries in the

segment table of two different jobs point to the same physical location. The two segment tables must

have identical base pointers, and the shared segment number must be the same in the two processes.

10. In a multiprogramming environment, many processes may be active. What are the tasks that

the OS must accomplish in order to manage the memory requirements of active processes?

The OS must keep track of where and how a program resides in memory and convert logical program

addresses into actual memory addresses.

11. Distinguish between logical addresses and physical addresses.

A physical address is an actual address in the computer's main memory device. A logical address is an

address relative to the program. A logical address is sometimes called a relative address for obvious

reasons.

12. What is address binding?

Address binding is the mapping of a logical address into a physical address.

13. Name two memory management techniques and give the general approach taken in each?

Single contiguous memory management:

- Only the OS and one application program are loaded into memory at the same time.

Paging:

- Main memory is divided into fixed-sized blocks called frames and processes are divided into

fixed-sized blocks called pages. Any number of programs can be loaded with the OS, but a

process does not necessarily have to be in contiguous memory and not all of a process need be in

memory at the same time.

14. When is a logical address assigned to a variable?

When the program is compiled.

15. When does address binding occur?

When the program is loaded into memory.

16. How is memory divided in the single contiguous memory management approach?

Memory is divided into two sections, one for the operating system and one for the application program.

17. When a program is compiled, where is it assumed that the program will be loaded into

memory? That is, where are logical addresses assumed to begin?

At location 0.

18. In a single contiguous memory management approach, if the logical address of a variable is L

and the beginning of the application program is A, what is the formula for binding the logical

address to the physical address?

L + A

19. If, in a single contiguous memory management system, the program is loaded at address 30215,

compute the physical addresses (in decimal) that correspond to the following logical addresses:

A. 9223 39438 (30215 + 9223)

B. 2302 32517 (30215 + 2302)

C. 7044 37259 (30215 + 7044)

20. If, in a fixed partition memory management system, the current value of the base register is

42993 and the current value of the limit register is 2031, compute the physical addresses that

correspond to the following logical addresses:

A. 104 43097

B. 1755 44748

C. 3041 Address out of bounds of partition. Because the generated address is greater than Base + limit.

21. Examples of allocating partitions in memory some requests

22. For the following state of memory.

Operating System

Process 1

Empty 60 blocks

Process 2

Process 3

Empty 52 blocks

Empty 100 blocks

If the partitions are fixed and a new job arrives requiring 52 blocks of main memory, show

memory after using each of the following partition selection approaches:

A. First fit

B. Best fit

C. Worst fit

First Fit Best Fit Worst Fit

Operating System

Process 1

New Process

Process 2

Process 3

Empty 52 blocks

Empty 100 blocks

Operating System

Process 1

Empty 60 blocks

Process 2

Process 3

New Process

Empty 100 blocks

Operating System

Process 1

Empty 60 blocks

Process 2

Process 3

Empty 52 blocks

New process

23. If a logical address in a paged memory management system is <2, 133>, what do the values

mean?

This address means the 133 byte on page 2.

24. For the following page table ( assume frame size=1024):

Page Frame

0 5

1 2

2 7

3 3

a. What is the physical address associated with the logical address <2, 85>?

From the table Page 2 is mapped to frame 7

(7 frame No. * 1024 Frame size ) + 85 offset = 7253

b. What is the physical address associated with the logical address <3,555>?

3627 (the same as the previous question)

c. What is the physical address associated with the logical address <3, 1555>?

If the frame size of 1024, Illegal address. The offset is larger than the page size.

25. What is virtual memory and how does it apply to demand paging?

Virtual memory is the illusion that memory is limitless and thus there is no limit on the size of a program.

Demand paging is the technique where pages are brought into memory only when they are referenced

(needed). Demand paging allows programs of any size, thus giving the illusion of infinite memory.

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26. Explain the difference between internal and external fragmentation.

Internal Fragmentation is the area in a region or a page that is not used by the job occupying that

region or page. This space is unavailable for use by the system until that job is finished and the page or

region is released. The main difference is the allocation: internal fragmentation is allocated area and

unused but external fragmentation is unallocated area and unused.

27. Given five memory partitions of 100 KB, 500 KB, 200 KB, 300 KB, and 600 KB (in order), how

would each of the first-fit, best-fit, and worst-fit algorithms place processes of 212 KB, 417 KB,

112 KB, and 426 KB (in order)?Which algorithm makes the most efficient use of memory?

Let p1, p2, p3 & p4 are the names of the processes

a. First-fit:

P1>>> 100, 500, 200, 300, 600

P2>>> 100, 288, 200, 300, 600

P3>>> 100, 288, 200, 300, 183

100, 116, 200, 300, 183 <<<<< final set of hole

P4 (426K) must wait

b. Best-fit:

P1>>> 100, 500, 200, 300, 600

P2>>> 100, 500, 200, 88, 600

P3>>> 100, 83, 200, 88, 600

P4>>> 100, 83, 88, 88, 600

100, 83, 88, 88, 174 <<<<< final set of hole

c. Worst-fit:

P1>>> 100, 500, 200, 300, 600

P2>>> 100, 500, 200, 300, 388

P3>>> 100, 83, 200, 300, 388

100, 83, 200, 300, 276 <<<<< final set of hole

P4 (426K) must wait

In this example, Best-fit turns out to be the best because there is no wait processes.

28. Consider a logical address space of 64 pages of 1024 words each, mapped onto a physical

memory of 32 frames.

a. How many bits are there in the logical address?

m =???

Size of logical address space = 2m = # of pages × page size

2m = 64 × 1024

2m = 26 × 210

2m =216 »» m=16 bit

b. How many bits are there in the physical address?

Let (x) is number of bits in the physical address

x =???

Size of physical address space = 2x

Size of physical address space = # of frames × frame size

(frame size = page size )

Size of physical address space = 32 × 1024

2x =25 × 210

2x = 215

»» number of required bits in the physical address=x =15 bit

29. Consider a logical address space of 32 pages of 1024 words per page, mapped onto a physical

memory of 16 frames.

a. How many bits are required in the logical address?

m =???

Size of logical address space = 2m = # of pages × page size

= 32 × 1024 = 215 »» m=15 bit

How many bits are required in the physical address?

Size of physical address space = # of frames × frame size

(frame size = page size )

Size of physical address space = 16 × 1024 = 214

»» number of required bits in the physical address =14 bit

30. Assuming a 1-KB page size, what are the page numbers and offsets for the following address

references (provided as decimal numbers)

2375 , 256 , 30000, 19366 , 16385

Answer:

Page size =2n =1024 B= 210 B

# of bits in offset part (n) =10

Solution steps : 1. Convert logical address: Decimal Binary

2. Split binary address to 2 parts (page # , Offset), offset : n digits

3. Convert offset & page# : Binary Decimal

Logical

address

(decimal)

Logical address

(binary)

Page #

(6 bits)

(binary)

Offset (10 bits)

(binary)

Page #

(decimal)

Offset

(decimal)

2375 0000 1001 0100 0111 0000 10 01 0100 0111 2 327

19366 0100 1011 1010 0110 0100 10 11 1010 0110 18 934

30000 0111 0101 0011 0000 0111 01 01 0011 0000 29 304

256 0000 0001 0000 0000 0000 00 01 0000 0000 0 256

16385 0100 0000 0000 0001 0100 00 00 0000 0001 16 1

31. Consider the following segment table:

Segment Base Length

0 219 600

1 2300 14

2 90 100 >> there is a typing error in this row in book

3 1327 580

4 1952 96

What are the physical addresses for the following logical addresses?

a. 0,430

b. 1,10

c. 2,500

d. 3,400

e. 4,112

a. 219 + 430 = 649

b. 2300 + 10 = 2310

c. illegal reference, trap to operating system

d. 1327 + 400 = 1727

e. illegal reference, trap to operating system

32. Compare the main memory organization schemes of contiguous-memory allocation, pure

segmentation, and pure paging with respect to the following issues:

External fragmentation, internal fragmentation and ability to share code across processes

Answer:

Method External fragmentation Internal

fragmentation ability to share code

contiguous-memory

allocation

(variable size

method)

There is external fragmentation (as address spaces are allocated

contiguously and holes develop as

finished processes release its space

and new processes are allocated

and the size of the new process is

almost smaller than the old one)

There is no

internal

fragmentation

It does not allow

processes to share

code.

pure paging There is no external fragmentation There is

internal

fragmentation

(it appears in

the last frame

because the

process size

almost not a

multiplex of

page size )

Able to share code

between processes

pure segmentation There is external fragmentation

(fragmentation would occur as

segments of finished processes are

replaced by segments of new

processes.

and the size of the new process is

almost smaller than the old one)

There is no

internal

fragmentation

Able to share code

between processes

33. Given the following stream of page references by an application, calculate the number of page

faults the application would incur with the following page replacement algorithms. Assume

that all pages are initially free.

Reference Stream: A B C D A B E A B C D E B A B

a. FIFO page replacement with 3 physical pages available

b. LRU page replacement with 3 physical pages available.

c. OPT page replacement with 3 physical pages available.

True or False?

1. An address generated by the CPU is also referred to as a physical address.

2. Fragmentation can still occur in paging systems

3. A program does not need to be stored in memory in its entirety.

4. A physical address space is at least as large as a virtual address space.

5. In a pure demand paged system a page is never brought into memory until it is needed.

6. Approximation algorithms are almost always used when implementing LRU.

7. What is the hardware device that maps virtual to physical addresses?

8. What are the three strategies for selecting a free hole from the set of available holes?

9. What are the two forms of fragmentation?

10. List at least two possible parts of a program that may be assigned separate segments.

11. What are the two parts of an address generated by the CPU?

12. What does each entry in the page table contain?

13. What is the term that describes when a page number is not present in the TLB?

14. If a page offset is 13 bits, how large (in bytes) is the page?

15. How many entries are in a two-level page table with a 20-bit page number?

16. When does a page fault occur?

17. What is the simplest page replacement algorithm?

18. What is the name of the page replacement algorithm that operates by

19. Replacing the page that will not be used for the longest period of time?

20. What page replacement algorithm could be implemented using a stack or counters?

21. Name two differences between logical and physical addresses.

Some Solved Questions on Process Management

1. What are the conceptual stages through which a process moves while being managed by the

operating system?

New, ready, running, waiting, and terminated

2. Describe how a process might move through the various process states. Create specific reasons

why this process moves from one state to another.

A new process begins in the new state. When the process has no bars to its execution, it moves into the

ready state. It waits in the ready state until it gets time in the running state. It runs for a while and

issues a command for file input. The process is moved into the waiting state until the I/O has been

completed, at which time it moves into the ready state to await another turn in the running state.

Eventually it gets back to the CPU and runs until it needs access to a part of the program that is on

secondary storage. It moves into the waiting state until the needed pages are brought in; then it moves

back to the ready state. It gets its third shot at the CPU and finishes, and moves into the terminated

state.

3. What is a process control block?

A process control block (PCB) is a data structure that contains information about a process. A PCB is

created for each new process. When a process moves from one state to another, its PCB is moved with

it.

4. How is each conceptual stage represented in the OS?

Each conceptual stage is represented by a list of the PCBs in that stage.

5. What is a context switch?

When a process is moved out of the CPU, the current contents of the registers including the program

counter must be saved in the process's PCB. When a new process moves into the CPU, the contents of

the registers from this process's PCB are restored. This process of saving and restoring registers is called

a context switch.

6. Distinguish between preemptive scheduling and non-preemptive scheduling.

With non-preemptive scheduling, once a process is in the running state it remains there until it

voluntarily leaves. With preemptive scheduling, the OS can move a process from the running state to

the waiting state or ready state.

7. Name and describe three CPU scheduling algorithms.

First-come, first-served: The processes are moved into the running state in the order in which they arrive in the ready.

Shortest job First: When the CPU is ready for another job, the process in the ready state that takes the shortest

time is moved into the running state. The estimated length of time that a process needs the CPU may

or may not be accurate.

Round robin:

Each process stays in the running state for a predetermined amount of time, called a time slice.

When a process's time slice is over, it is moved back into the ready state, where it stays until it is its turn

again for the CPU.

8. Use the following table of processes and service time for Exercises 69 through 71.

Process P1 P2 P3 P4 P5

Service

time

120 60 180 50 300

a Draw a Gantt chart that shows the completion times for each process using

first-come, first served CPU scheduling.

0 120 180 360 410 710

P1 P2 P3 P

4

P5

b Draw a Gantt chart that shows the completion times for each process using

shortest-job-next CPU scheduling.

0 50 110 230 410 710

P4 P2 P1 P3 P5

c Draw a Gantt chart that shows the completion times for each process using

round-robin CPU scheduling with a time slice of 60.