Sensitivity Analysis of IBIS-parameters with HSPICE · PDF fileYour Success is Our Goal...

Your Success is Our Goal

Sensitivity Analysis of IBIS-parameters

with HSPICE

DATE 2004IBIS Summit

Meeting Paris 2004

Manfred Maurer

Email: [email protected]


EUROPEAN IBIS SUMMIT MEETING 2004

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Overview

• Motivation

• Sensitivity analysis main focus of the design process

• Scaling of the static / dynamic curves of a IBIS model

• Sensitivity analysis with a IBIS-model

• Summary



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Motivation

n Confidence level of the IBIS-Model

n Timing Budget of the design very small

n Application different to the IBIS-model conditions

n Which parameter variation of the IBIS-model have the greatest impact to the time delay on the PCB

n Design robustness has to be evaluated

n Model adjustments to the Golden Waveform

?



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Design Methodologies

n Timing Spreadsheet ( Worst-Case and Statistical)

uSignal integrity / ISI and EMC

n Design Solution Space = (Electrical + Layout + Thermal) Requirements

n Design Guidelines (only) for the actual project

n è Sensitivity Analysis ç

uUncertainty of Reference Voltage (Vth) and Loads

uDifferent TopologiesuThermal considerations

uDetermine Corner conditionsu Initial Monte Carlo Analysis è significance and trend of each variable

uEye Diagrams / fix ISI



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Localization of the actual analysis

Backplane/Cable

can_hIBIS

C1

can_l

Vdd1

GND

CF 150134

C0

S1S2

C3

S3S4

GND

Vdd2

GND

CMOSBuffer

out_1_A

out_1_B

out_2_B

out_2_A

in_1

in_2

in_2

C2

in_1in_2

S5

S6

Rs

TxD

RxD

1

2

3

4

5

Ref_load

Subsystem A

SVVdd1

SVVdd2

can_h IBISModel

C1

can_l

Vdd1

GNDC0

S1 S2

C3

S3 S4

GND

Vdd2

GND

CMOSout_1_A

out_1_B

out_2_B

out_2_A

in_1

in_2

in_2

C2

in_1in_2

S5

S6

Rs

TxD

RxD

Subsystem B

SVVdd1

6

6

Buffer

Backplane/Cable

can_hIBIS

C1

can_l

Vdd1

GND

CF 150134

C0

S1S2

C3

S3S4

GND

Vdd2

GND

CMOSBuffer

out_1_A

out_1_B

out_2_B

out_2_A

in_1

in_2

in_2

C2

in_1in_2

S5

S6

Rs

TxD

RxD

1

2

3

4

5

Ref_load

Subsystem A

SVVdd1

SVVdd2

can_h IBISModel

C1

can_l

Vdd1

GNDC0

S1 S2

C3

S3 S4

GND

Vdd2

GND

CMOSout_1_A

out_1_B

out_2_B

out_2_A

in_1

in_2

in_2

C2

in_1in_2

S5

S6

Rs

TxD

RxD

Subsystem B

SVVdd1

6

6

Buffer

Focus of investigation



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Input-Output Buffer (HSPICE)



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Scaling / tuning possibilities (HSPICE)

Pull upRamp

Pull upV/I

PowerClamp

GNDClamp

Pull downV/I

Pull downRamp

OutputPackage

PowerClamp

GNDClamp

GNDClamp

PowerClamp

Threshold&

EnableLogic

InputPackage

EnablePackage

fwf_tunerwf_tune

fwf_scal

rwf_scal

pd_scal

pu_scal

gc_scal

pc_scal

pc_scal

gc_scal

spu_scal

spd_scal



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HSPICE Syntax of an I/O-Buffer

If ramp=0|1èRAMP adjustment

C_comp distribution between nodes

PU / PD + PC / GC scaling

Rising WF / Falling WF scaling

If power=off è adjustment of the PU/PD curves



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Definition of the Distribution Function

3.09 sigma è 99.8%3.09 sigma è 99.8%



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Timing reference -Scaled and Reference buffer

Sig_out

R_load

Sig_refBuf_ref

TFlight_Time

Tco

Buf_scal

V_term

R_loadV_term

Tramp_20_80

Sig_out

R_load

Sig_refBuf_ref

TFlight_Time

Tco

Buf_scal

V_term

R_loadV_term

Tramp_20_80

èTFlight_Time = Diff TcoèTFlight_Time = Diff Tco



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Scaling of the static curves

IPUscal = pu_scal * I typ

IPUscal = pu_scal * I typ

IPDscal = pd_scal * I typ

IPDscal = pd_scal * I typ



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Wafeform scaling rwf_scal / fwf_scal0.85 / 3 sigma from typical

Ref_Signal typ.Ref_Signal typ.



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rwf_scalè Rising Waveform

IBIS-Model: B24_2 *rwf_scal=3sigma* *typ/min/max*

-1,00E-09

-8,00E-10

-6,00E-10

-4,00E-10

-2,00E-10

0,00E+00

2,00E-10

4,00E-10

6,00E-10

8,00E-10

1,00E-09

0,2 0,4 0,6 0,8 1 1,2 1,4 1,6

r/f_wf_scal

Td_

ram

p20/

80 +

T_f

light

_tim

e (s

)

r_ramp_typ

r_FT_typ

r_FT_minr_ramp_max

r_FT_max

r_ramp_min

Ramp_(20_80)%Ramp_(20_80)%

typtyp

TcoTco



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fwf_scalè Falling Waveform

IBIS-Model: B24_2 *fwf_scal=3sigma* *typ/min/max*

-8,00E-10

-6,00E-10

-4,00E-10

-2,00E-10

0,00E+00

2,00E-10

4,00E-10

6,00E-10

8,00E-10

1,00E-09

0,2 0,4 0,6 0,8 1 1,2 1,4 1,6

f_wf_scal

Td_

ram

p20/

80 +

T_f

light

_tim

e (s

)

f_ramp_typ

f_FT_typ

f_ramp_minf_FT_min

f_ramp_max

f_FT_max

TcoTco

Ramp_(20_80)%Ramp_(20_80)%

typtyp



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Sensitivity analysison a 4 RAM topology

Sig_out

W - Model

SRAM R0

C5e

Sig_refC5e Ref_Load(DS)

l1

lr

lr

lr

l21

l2

lr

SRAM R3

SRAM R2

SRAM R1

l1 30-40mm l2, l21 15-20mmlr 3-13mm

TFlight_TimeTco

Tpd_tot = Tco + T Flight_Time

Sig_out

W - Model

SRAM R0

C5e

Sig_refC5e Ref_Load(DS)

l1

lr

lr

lr

l21

l2

lr

SRAM R3

SRAM R2

SRAM R1

l1 30-40mm l2, l21 15-20mmlr 3-13mm

TFlight_TimeTco

Tpd_tot = Tco + T Flight_Time

pu_scalpu_scal

pd_scalpd_scal

rwf_scalrwf_scal fwf_scalfwf_scal

5% rel_var/ Gauss Distribution5% rel_var/ Gauss Distribution



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Signal Integrity (SI) and ISI è FT

Ref_SignalRef_Signal

RAM_INP.RAM_INP.



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Signal integrity (SI) and ISI (Zoom)

RAM1_INP.RAM1_INP.Ref_SignalRef_Signal

RAM2_INP.RAM2_INP.



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Flight Time of the RAM1&2

Flight Time (rise/fall) RAM1/2 Gauss-distriution

6,00E-10

7,00E-10

8,00E-10

9,00E-10

1,00E-09

1,10E-09

1,20E-09

1,30E-09

1,40E-09

0,97 0,98 0,99 1 1,01 1,02 1,03 1,04

pu/pd_scal + r/fwf_scal

td_F

T(s

) tdr_c_v_r1e

tdf_c_v_r1e

tdr_c_v_r2etdf_c_v_r2e

FT fallFT fall

FT riseFT rise



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Summary

n The analysed model parameter are simulator specific , not IBIS model intrinsic

n The HSPICE B-element è external controlled parameters for model scaling

n With a typical IBIS model è sensitivity analysis are possible

n Robustness of a design can be quantified by the parameters of the B-element

uPu/pd parameter èdirect control of the static current (parameter+10% è +10%I)

uWF-parameter èno fix correlation to the ramp, nor the Tco / FT( IBIS-model specific)



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Kontaktadresse:

Peter MusterI&S GCSchuhstraße 6091052 ErlangenTel: 09131-7-24607Mail: [email protected]

Thank you very much for your attention.


Contact :

Manfred MaurerI&S IT PS MCH 2Otto-Hahn-Ring 6D-81739 MunichTel: +49 (0) 89 636 47421Mail: [email protected]

Sensitivity Analysis of IBIS-parameters

with HSPICE

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