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Doc. CX5012 v2.1 Page 2 of 15 © Calnex Solutions
1 Introduction to Clocks ............................................................................................................................... 3
1.1 What is a clock? ................................................................................................................................. 3
1.2 Timing Signals .................................................................................................................................... 3
1.3 Synchronisation Systems ................................................................................................................... 4
1.4 Clock Specifications ........................................................................................................................... 4
2 Packet-based Clocks .................................................................................................................................. 5
2.1 Packet Timing Signals ........................................................................................................................ 5
2.2 Two-way Timing Protocols ................................................................................................................ 6
2.3 Packet Timing Clocks ......................................................................................................................... 7
2.4 Packet Timing Systems ...................................................................................................................... 7
3 Boundary Clocks for Full Timing Support .................................................................................................. 8
3.1 Functional Model ............................................................................................................................... 8
3.2 Time Error Generation ....................................................................................................................... 9
3.3 Time Error Tolerance ....................................................................................................................... 10
3.4 Time Error Transfer.......................................................................................................................... 11
3.5 Short-term Transient Response ....................................................................................................... 12
3.6 Long-term Transient Response (Holdover) ..................................................................................... 13
4 Further Reading ....................................................................................................................................... 14
Doc. CX5012 v2.1 Page 3 of 15 © Calnex Solutions
Timing jitter and wander
time
Timing signal Significant instants
Doc. CX5012 v2.1 Page 4 of 15 © Calnex Solutions
PRC Up to 20 SECs* Up to 20 SECs* SSU SSU Up to 20 SECs* SSU
Up to 10 SSUs
End Equipment
* No more than 60 SECs allowed in any one chain
Doc. CX5012 v2.1 Page 5 of 15 © Calnex Solutions
F H H \ F Payload H F
Packet Delay Variation Event Packets (header, payload and footer)
Significant instants
time
F H H \ F Payload H F F H H \ F Payload H F F H H \ F Payload H F
Doc. CX5012 v2.1 Page 6 of 15 © Calnex Solutions
Slave Clock Time
Data at Slave Clock
DELAY_RESP message containing value of t4
SYNC message
DELAY_REQ message
time t1, t2, t3, t4
t1, t2
t1, t2, t3
t2
t3
t1
t4
Master Clock Time
Doc. CX5012 v2.1 Page 7 of 15 © Calnex Solutions
PTP GM PTP Slave
PTP GM PTP Slave
Full Timing Support (G.8275.1): every switch/router on the path between GM and slave contains a PTP Boundary Clock
Partial Timing Support (G.8275.2): not all switch/routers on the path between GM and slave contain a PTP Boundary Clock
switch/routers containing a PTP BC
ordinary switch/routers
Doc. CX5012 v2.1 Page 8 of 15 © Calnex Solutions
EEC
SyncE SyncE
1pps
PTP PTP
Slav
e
Mas
ter
Doc. CX5012 v2.1 Page 9 of 15 © Calnex Solutions
EEC
SyncE SyncE
1pps
PTP PTP
Slav
e
Mas
ter
Interval
Tim
e In
terv
al E
rro
r
“Ideal” Freq. Ref
Time
Tim
e Er
ror “Ideal” Time Ref
Time
Tim
e Er
ror “Noisy” output
Doc. CX5012 v2.1 Page 10 of 15 © Calnex Solutions
Figure 8: T-BC Time Error Tolerance
EEC
SyncE SyncE
1pps
PTP PTP
Slav
e
Mas
ter
Interval
Tim
e In
terv
al E
rro
r
“Noisy” Freq. Ref
Time
Tim
e Er
ror “Noisy” Time Ref
Time
Tim
e Er
ror “Noisy” output
MTIE
τ (s)
660ns
360ns
250ns
1µs
100ns0.01 0.0625 1 2.2 10 100 275 1000 100000.1
Doc. CX5012 v2.1 Page 11 of 15 © Calnex Solutions
0.05 0.1 Frequency, Hz
Amplitude, dB
Slope of 20dB/decade
Amplitude, dB
0.05 0.1 Frequency, Hz
Slopes of 20dB/decade
1 10
Doc. CX5012 v2.1 Page 12 of 15 © Calnex Solutions
EEC
SyncE SyncE
1pps
PTP PTP
Slav
e
Mas
ter
Interval
Tim
e In
terv
al E
rro
r
Sinusoidal Wander
Time
Tim
e Er
ror Sinusoidal Time Error
Time
Tim
e Er
ror Attenuated output
Doc. CX5012 v2.1 Page 13 of 15 © Calnex Solutions
T-BC output phase mask for first output phase error transient after start of SyncE rearrangement
Time after start of first output phase error transient (s)
0 5 10 15 20 25 30
Maxim
um
phase e
rror
(ns)
0
50
100
150
200
250
300
350
Doc. CX5012 v2.1 Page 14 of 15 © Calnex Solutions
